diff options
Diffstat (limited to 'contrib/qemu/include/exec')
-rw-r--r-- | contrib/qemu/include/exec/cpu-common.h | 124 | ||||
-rw-r--r-- | contrib/qemu/include/exec/hwaddr.h | 20 | ||||
-rw-r--r-- | contrib/qemu/include/exec/poison.h | 63 |
3 files changed, 0 insertions, 207 deletions
diff --git a/contrib/qemu/include/exec/cpu-common.h b/contrib/qemu/include/exec/cpu-common.h deleted file mode 100644 index e4996e19c32..00000000000 --- a/contrib/qemu/include/exec/cpu-common.h +++ /dev/null @@ -1,124 +0,0 @@ -#ifndef CPU_COMMON_H -#define CPU_COMMON_H 1 - -/* CPU interfaces that are target independent. */ - -#ifndef CONFIG_USER_ONLY -#include "exec/hwaddr.h" -#endif - -#ifndef NEED_CPU_H -#include "exec/poison.h" -#endif - -#include "qemu/bswap.h" -#include "qemu/queue.h" - -/** - * CPUListState: - * @cpu_fprintf: Print function. - * @file: File to print to using @cpu_fprint. - * - * State commonly used for iterating over CPU models. - */ -typedef struct CPUListState { - fprintf_function cpu_fprintf; - FILE *file; -} CPUListState; - -#if !defined(CONFIG_USER_ONLY) - -enum device_endian { - DEVICE_NATIVE_ENDIAN, - DEVICE_BIG_ENDIAN, - DEVICE_LITTLE_ENDIAN, -}; - -/* address in the RAM (different from a physical address) */ -#if defined(CONFIG_XEN_BACKEND) -typedef uint64_t ram_addr_t; -# define RAM_ADDR_MAX UINT64_MAX -# define RAM_ADDR_FMT "%" PRIx64 -#else -typedef uintptr_t ram_addr_t; -# define RAM_ADDR_MAX UINTPTR_MAX -# define RAM_ADDR_FMT "%" PRIxPTR -#endif - -/* memory API */ - -typedef void CPUWriteMemoryFunc(void *opaque, hwaddr addr, uint32_t value); -typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr); - -void qemu_ram_remap(ram_addr_t addr, ram_addr_t length); -/* This should not be used by devices. */ -MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr); -void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev); - -void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, - int len, int is_write); -static inline void cpu_physical_memory_read(hwaddr addr, - void *buf, int len) -{ - cpu_physical_memory_rw(addr, buf, len, 0); -} -static inline void cpu_physical_memory_write(hwaddr addr, - const void *buf, int len) -{ - cpu_physical_memory_rw(addr, (void *)buf, len, 1); -} -void *cpu_physical_memory_map(hwaddr addr, - hwaddr *plen, - int is_write); -void cpu_physical_memory_unmap(void *buffer, hwaddr len, - int is_write, hwaddr access_len); -void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)); - -bool cpu_physical_memory_is_io(hwaddr phys_addr); - -/* Coalesced MMIO regions are areas where write operations can be reordered. - * This usually implies that write operations are side-effect free. This allows - * batching which can make a major impact on performance when using - * virtualization. - */ -void qemu_flush_coalesced_mmio_buffer(void); - -uint32_t ldub_phys(hwaddr addr); -uint32_t lduw_le_phys(hwaddr addr); -uint32_t lduw_be_phys(hwaddr addr); -uint32_t ldl_le_phys(hwaddr addr); -uint32_t ldl_be_phys(hwaddr addr); -uint64_t ldq_le_phys(hwaddr addr); -uint64_t ldq_be_phys(hwaddr addr); -void stb_phys(hwaddr addr, uint32_t val); -void stw_le_phys(hwaddr addr, uint32_t val); -void stw_be_phys(hwaddr addr, uint32_t val); -void stl_le_phys(hwaddr addr, uint32_t val); -void stl_be_phys(hwaddr addr, uint32_t val); -void stq_le_phys(hwaddr addr, uint64_t val); -void stq_be_phys(hwaddr addr, uint64_t val); - -#ifdef NEED_CPU_H -uint32_t lduw_phys(hwaddr addr); -uint32_t ldl_phys(hwaddr addr); -uint64_t ldq_phys(hwaddr addr); -void stl_phys_notdirty(hwaddr addr, uint32_t val); -void stw_phys(hwaddr addr, uint32_t val); -void stl_phys(hwaddr addr, uint32_t val); -void stq_phys(hwaddr addr, uint64_t val); -#endif - -void cpu_physical_memory_write_rom(hwaddr addr, - const uint8_t *buf, int len); - -extern struct MemoryRegion io_mem_rom; -extern struct MemoryRegion io_mem_notdirty; - -typedef void (RAMBlockIterFunc)(void *host_addr, - ram_addr_t offset, ram_addr_t length, void *opaque); - -void qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque); - -#endif - -#endif /* !CPU_COMMON_H */ diff --git a/contrib/qemu/include/exec/hwaddr.h b/contrib/qemu/include/exec/hwaddr.h deleted file mode 100644 index c9eb78fba18..00000000000 --- a/contrib/qemu/include/exec/hwaddr.h +++ /dev/null @@ -1,20 +0,0 @@ -/* Define hwaddr if it exists. */ - -#ifndef HWADDR_H -#define HWADDR_H - -#define HWADDR_BITS 64 -/* hwaddr is the type of a physical address (its size can - be different from 'target_ulong'). */ - -typedef uint64_t hwaddr; -#define HWADDR_MAX UINT64_MAX -#define TARGET_FMT_plx "%016" PRIx64 -#define HWADDR_PRId PRId64 -#define HWADDR_PRIi PRIi64 -#define HWADDR_PRIo PRIo64 -#define HWADDR_PRIu PRIu64 -#define HWADDR_PRIx PRIx64 -#define HWADDR_PRIX PRIX64 - -#endif diff --git a/contrib/qemu/include/exec/poison.h b/contrib/qemu/include/exec/poison.h deleted file mode 100644 index 2341a750413..00000000000 --- a/contrib/qemu/include/exec/poison.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Poison identifiers that should not be used when building - target independent device code. */ - -#ifndef HW_POISON_H -#define HW_POISON_H -#ifdef __GNUC__ - -#pragma GCC poison TARGET_I386 -#pragma GCC poison TARGET_X86_64 -#pragma GCC poison TARGET_ALPHA -#pragma GCC poison TARGET_ARM -#pragma GCC poison TARGET_CRIS -#pragma GCC poison TARGET_LM32 -#pragma GCC poison TARGET_M68K -#pragma GCC poison TARGET_MIPS -#pragma GCC poison TARGET_MIPS64 -#pragma GCC poison TARGET_OPENRISC -#pragma GCC poison TARGET_PPC -#pragma GCC poison TARGET_PPCEMB -#pragma GCC poison TARGET_PPC64 -#pragma GCC poison TARGET_ABI32 -#pragma GCC poison TARGET_SH4 -#pragma GCC poison TARGET_SPARC -#pragma GCC poison TARGET_SPARC64 - -#pragma GCC poison TARGET_WORDS_BIGENDIAN -#pragma GCC poison BSWAP_NEEDED - -#pragma GCC poison TARGET_LONG_BITS -#pragma GCC poison TARGET_FMT_lx -#pragma GCC poison TARGET_FMT_ld - -#pragma GCC poison TARGET_PAGE_SIZE -#pragma GCC poison TARGET_PAGE_MASK -#pragma GCC poison TARGET_PAGE_BITS -#pragma GCC poison TARGET_PAGE_ALIGN - -#pragma GCC poison CPUArchState -#pragma GCC poison env - -#pragma GCC poison lduw_phys -#pragma GCC poison ldl_phys -#pragma GCC poison ldq_phys -#pragma GCC poison stl_phys_notdirty -#pragma GCC poison stw_phys -#pragma GCC poison stl_phys -#pragma GCC poison stq_phys - -#pragma GCC poison CPU_INTERRUPT_HARD -#pragma GCC poison CPU_INTERRUPT_EXITTB -#pragma GCC poison CPU_INTERRUPT_HALT -#pragma GCC poison CPU_INTERRUPT_DEBUG -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_0 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_1 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_2 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_3 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_4 -#pragma GCC poison CPU_INTERRUPT_TGT_INT_0 -#pragma GCC poison CPU_INTERRUPT_TGT_INT_1 -#pragma GCC poison CPU_INTERRUPT_TGT_INT_2 - -#endif -#endif |